In magnetic disk storage systems for computers, digital data serves to modulate the current in a read/write head coil so that a sequence of corresponding magnetic flux transitions are written onto the surface of the magnetic disk in a series of concentric tracks. When reading this recorded data, the read/write head again passes over the magnetic disk and transduces the magnetic transitions into pulses in an analog signal that alternate in polarity. These pulses are then decoded by read channel circuitry to reproduce the digital data.
The read/write head is normally mounted on an actuator arm which is positioned by means of a DC brushless motor (and typically a voice coil motor “VCM”. A servo system controls the VCM, and thereby the head position, necessary for reading and writing information in response to requests from a host computer connected to the disk drive. The servo system performs two functions: (1) a “seek” or “access” function in which the servo system moves the head to a selected track; and (2) when the head reaches the selected track, a “track following” or “tracking” function in which it accurately positions the head over a centerline of the track and maintains that position as successive portions of the track pass by the head. Servo control information embedded within the data provides inter-track head position information so that a head position error, indicative of a difference between the actual head position and the desired head position, can be computed. In response to the head position error, the servo control system generates a VCM control signal to align the head over the centerline of the selected track, thereby driving the head position error to zero.
The embedded servo control information recorded on the magnetic disk typically includes a servo track address field for course positioning of the read/write head, and a burst field for fine positioning over a centerline of the selected track. During a seek operation, when the servo controller is moving the read/write head to a new track, the track address identifies the current track passing under the head. The current track address is detected by the read head, decoded by the read channel circuitry, and transmitted to the servo controller. The servo controller compares the current track address with a target track address to generate a track position error. The track position error is converted into an actuator control signal for controlling the velocity of the head as it approaches the target track. Once the read head arrives at the target track, the servo controller switches into a tracking mode and processes the servo burst fields in order to maintain the head over the track's centerline.
As shown in FIGS. 1A and 1B, the servo data 2 is recorded on the magnetic disk 4 as radial spokes of information embedded within the circular tracks. The tracks, arranged from an inner track 6 to an outer track 8, comprise a plurality of sectors 10 for recording user data. As previously described, the servo data 2 includes a track address field 12 and a servo burst field 14. During a seek operation, as the read/write head traverses the magnetic disk toward the target track at a very high speed, a track address might be detected as part of a current track and part of the next adjacent track. Unless adjacent track addresses are different by only one bit, the detected track address will be grossly incorrect. Therefore, the track address cannot be recorded in its direct binary representation since more than one bit would change between adjacent tracks (e.g., track #4=0100 and track #3=0011 might be detected as track #7=0111).
Normally, a Gray code encodes the track address before it is recorded onto the disk to ensure that adjacent addresses is differ by only one bit. The Gray code is further encoded to ensure that the recorded channel data of adjacent track addresses differ in only two adjacent bits (i.e., the flux pattern of adjacent track addresses differs in an area equal to the width of one bit cell.) After a track address is detected, it is converted from its Gray code representation back into its binary representation, then subtracted from the target track address to generate the head position error.
In conventional peak detection read channels, analog circuitry, responsive to threshold crossing or derivative information, detects peaks in the continuous time analog read signal. The analog read signal is “segmented” into bit cell periods and interpreted during these segments of time. The presence of a peak during the bit cell period represents a “1” bit, whereas the absence of a peak represents a “0” bit. The most common errors in detection occur when the bit cells are not correctly aligned with the analog pulse data. Timing recovery, then, adjusts the bit cell periods so that the peaks occur in the center of the bit cells on average in order to minimize detection errors. Since timing information is derived only when peaks are detected, the input data stream is normally run length limited (RLL) to limit the number of consecutive “0”, bits. The input data stream is also frequently RLL encoded to limit the spacing of “1” bits so as to minimize the undesirable effect of inter-symbol interference (ISI).
An RLL code denoted (d,k) encodes the input data stream such that at least d “0” bits occur between each “1” bit and no more than k “0” bits occur consecutively. A typical RLL (1,7) rate 2/3 code encodes 2 input data bits into 3 codeword bits recorded on the disk. The user data to codeword rate 2/3 in this example) is an important factor in the overall storage capacity of the disk drive. As the rate approaches unity, more user data is stored to the disk rather than codeword data. Although, the d=1 constraint decreases the codeword rate, it also allows a faster write frequency and thereby allows more codeword data to be written to the disk. In fact, a d=1 rate 2/3 code allows more user data to be stored on the disk than a d=0 code at any rate assuming both systems use the same minimum distance between flux transitions on the disk.
A d=1 recording system, however, requires a more sophisticated method for encoding and decoding the data. As a result, prior art recording systems have used a d=1 constraint for user data but not for the servo data. Disk storage designers have opted to use less complex, less expensive, and slower servo detectors rather than a d constraint even though the d constraint can increase the overall data density of the storage system. This has not been a problem in the past due to the marginal gain in density that a d constraint would have provided. Prior art storage systems, such as that disclosed by Moon et al. in U.S. Pat. No. 4,783,705, advantageously use the same peak detection circuitry for detecting user data and servo data, thereby reducing the system's cost and complexity.
With the dramatic increase in data density for magnetic disk storage systems and especially with the advent of partial response maximum likelihood (PRML) Viterbi sequence detection, encoding the servo data with a d=1 constraint can provide a more than marginal improvement. This improvement is even more significant in ID-Less storage systems where the size of the servo field has been expanded in order to store sector identifying information. However, unless the servo data is recorded with a d=1 constraint, a d=1 Viterbi sequence detector in a PRML read channel cannot be used to detect the servo data. Instead, a separate peak detector would be required which is highly inefficient.
What is needed is a cost effective solution to encoding and decoding servo data with a d=1 constraint in order to take advantage of the resulting increase in data density. It is a further object to use the Viterbi sequence detector in PRML read channels for detecting both user data and servo data rather than employ a separate peak detector for detecting the servo data.